NIT :: NanoIC Technology Lab

Journals

Publication in Journals

  • 230

    Joong Gun Oh†, Kwanyong Pak†, Chung Sun Kim, Jae Hoon Bong, Wan Sik Hwang, Sung Gap Im* and Byung Jin Cho*, "A High-Performance Top-Gated Graphene Field-Effect Transistor with Excellent Flexibility Enabled by an iCVD Copolymer Gate Dielectric", Small, October. 2017. (Accepted)

  • 229

    Eui Joong Shin, Soo Yeon Park, Choong Sun Kim, Byung Jin Cho, and Jung-Woo Choi, "MConstruction of a Multiway Carbon Nanotubes Loudspeaker with Finely Tunable Resonance Frequencies", Advanced Materials Technology, October. 2017. (Accepted)

  • 228 Gyusoup Lee, Garam Choi, Choong Sun Kim, Yong Jun Kim, Hyeongdo Choi, Seongho Kim, Hyo Seok Kim, Won Bo Lee, 

    and Byung Jin Cho, "Material Optimization for a High Power Thermoelectric Generator in Wearable Applications", Applied Science, September. 2017. (Accepted)

  • 227 Yong Jun Kim, Sun Jin Kim, Hyeongdo Choi, Choong Sun Kim, Gyusoup Lee, Sang Hyun Park and Byung Jin Cho, "Realization of high-performance screen-printed flexible thermoelectric generator by improving contact characteristics", Advanced Materials Interfaces, September. 2017. (Accepted)
  • 226 Yujin Seo, Choog Ki Kim, Tae In Lee, Wan Sik Hwang, Hyun-Yong Yu, Yang Kyu Choi and Byung Jin Cho, "Investigation of border trap characteristics in the AlON/GeO2/Ge gate stacks", IEEE Transactions on Electron Devices, August. 2017. (Accepted)
  • 225 Seung-Yoon Kim, Jae Hoon Bong, Cheolgyu Kim, Wan Sik Hwang, Taek-Soo Kim, and Byung Jin Cho, "Mechanical stability analysis via neutral mechanical plane for high performance flexible Si nanomembrane FDSOI device", Advanced Materials Interfaces, August. 2017, 4, 17, 00618.
  • 224 Yujin Seo, Tae In Lee, Hyun Jun Ahn, Jung Min Moon, Wan Sik Hwang, Hyun-Yong Yu and Byung Jin Cho, " Fermi level de–pinning in Ti/GeO2/n–Ge via the interfacial reaction between Ti and GeO2", IEEE Transactions on Electron Devices, August. 2017. (Accepted)
  • 223 Hyung Do Choi, Sun Jin Kim, Yongjun Kim, Ju Hyung We, Min-Wook Oh and Byung Jin Cho, "Enhanced thermoelectric properties of screen-printed Bi0.5Sb1.5Te3 and Bi2Te2.7Se0.3 thick films using a post annealing process with mechanical pressure", Journal of Materials Chemistry C, vol. 5, pp. 8559-8565, July. 2017.
  • 222 Seong Jun Yoon, Kwanyong Pak, Taewook Nam, Alexander Yoon, Hyungjun Kim, Sung Gap Im, Byung Jin Cho, "Surface-Localized Sealing of Porous Ultralow-k Dielectric Films with Ultrathin (< 2 nm) Polymer Coating", ACS Nano, Vol. 11, No. 8, pp.7841-7847, July. 2017.
  • 221 Jae Hoon Bong, Seung-Yoon Kim, Chan Bae Jeong, Ki Soo Chang, Wan Sik Hwang and Byung Jin Cho, "Reliability Improvement of Flexible FD-SOI MOSFET via Heat Management", Applied Physics Letters, June. 2017. 110, 252101
  • 220 Yujin Seo, Tae In Lee, Chang Mo Yoon, Bo Eun Park, Wan Sik Hwang, Hyungjun Kim, Hyun-Yong Yu and Byung Jin Cho, "The Impact of an Ultrathin Y2O3 layer on GeO2 Passivation in Ge MOS Gate Stacks", IEEE Transactions on Electron Devices, Vol. 64, No.8, pp. 3303-3307, May. 2017
  • 219 Hyun Jun Ahn, Jungmin Moon, Yujin Seo, Tae In Lee, Choong Ki Kim, Hyun-Yong Yu, Wan Sik Hwang and Byung Jin Cho, "Formation of Low-resistivity Nickel Germanide Using Atomic Layer Deposited Nickel Thin Film", IEEE Transactions on Electron Devices, vol. 64, no. 6, pp. 2599-2603, April. 2017.
  • 218 Kook In Han, Seungdu Kim, In Gyu Lee, Jong Pil Kim, Jung-Ha Kim, Suck Won Hong, Byung Jin Cho and Wan Sik Hwang, "Compliment Graphene Oxide Coating on Silk Fiber Surface via Electrostatic Force for Capacitive Humidity Sensor Applications", Sensors, vol. 17, no. 2, pp. 407, Feb. 2017.
  • 217 Seul Ki Hong, Joong Gun Oh, Wan Sik Hwang and Byung Jin Cho, "Enhanced performance in graphene RF transistors via advanced process integration", Semiconductor Science and Technology., vol. 32, pp. 045009, Feb. 2017.
  • 216 Tae In Lee, Yujin Seo, Jungmin Moon, Hyun Jun Ahn, Hyun-Young Yu, Wan Sik Hwang, and Byung Jin Cho, "Lowering the Effective Work Function via Oxygen Vacancy Formation on the GeO2/Ge Interface", Solid State Electron., vol. 130, pp. 57-62, Jan. 2017.
  • 215

    Jae Hoon Bong, Cheolgyu Kim, Wan Sik Hwang, Taek-Soo Kim and Byung Jin Cho, "A Quantitative Strain Analysis of a Flexible Single-crystalline Silicon Membrane", Applied Physics Letters, vol. 110, no. 3, pp. 033105, Jan. 2017.

  • 214 Gwang-Sik Kim, Sun-Woo Kim, Seung-Hwan Kim, June Park, Yujin Seo, Byung Jin Cho, Changhwan Shin, Joon Hyung Shim, and Hyun-Yong Yu, “Effective Schottky Barrier Height Lowering of Metal/n-Ge with TiO2/GeO2 Interlayer Stack,” ACS Applied Materials & Interfaces, vol. 8, no. 51, pp. 35419-35425, Dec. 2016.
  • 213 Changho Shin, Jeong-Kyu Kim, Gwang-Sik Kim, Hyunjae Lee, Changhwan Shin, Jong-Kook Kim, Byung Jin Cho, and Hyun-Yong Yu, "Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET with Metal-Interlayer-Semiconductor Source/Drain", IEEE Transactions on Electron Devices, vol.63, no.11, pp.4167-4172, Nov, 2016
  • 212 Sun Jin Kim, Han Eol Lee, Hyeongdo Choi, Yongjun Kim, Ju Hyung We, Ji Seon Shin, Keon Jae Lee and Byung Jin Cho, “High-Performance Flexible Thermoelectric Power Generator using Laser Multi-Scanning Lift-Off Process”, ACS Nano,vol. 10, no. 11, pp. 10851-10857, Nov. 2016
  • 211 Sun Jin Kim, Hyeongdo Choi, Yongjun Kim, Ju Hyung We, Ji Seon Shin, Han Eol Lee, Min-Wook Oh4, Keon Jae Lee and Byung Jin Cho, “Post Ionized Defect Engineering of Screen-Printed Bi2Te2.7Se0.3 Thick Film for High Performance Flexible Thermoelectric Generator”, Nano Energy, DOI: 10.1016/j.nanoen.2016.11.034, Nov 2016
  • 210

    Seul Ki Hong, Jae Hoon Bong, Byung Jin Cho, and Wan Sik Hwang, "Vertically Formed Graphene Stripe for Three-Dimensional Field Effect Transistor Applications", Small, vol. 13, no. 3, pp. 1602373, Jan. 2017.

  • 209 Choong Sun Kim, Kyung Eun Lee, Jung-Min Lee, Sang Ouk Kim, Byung Jin Cho, and Jung-Woo Choi, "Application of N-doped 3-dimensional Reduced Graphene Oxide Aerogel to Thin Film Loudspeaker", ACS Applied Materials & Interfaces, vol. 8, no. 34, pp. 22295-22300, Aug. 2016.
  • 208 Seul Ki Hong, Choong Sun Kim, Wan Sik Hwang, and Byung Jin Cho, "Hybrid Integration of Graphene Analog and Silicon Complementary Metal–Oxide–Semiconductor Digital Circuits", ACS Nanovol. 10, no. 7, pp. 7142-7146, Jul. 2016. 
  • 207 Seung-Yoon Kim, Sung-Yool Choi, Wan Sik Hwang, and Byung Jin Cho, "Valley-engineered ultra-thin silicon for high-performance junctionless transistors", Scientific Reports, vol.6, 29354, Jun. 2016.
  • 206 Seung Min Song, Jae Hoon Bong, Wan Sik Hwang, and Byung Jin Cho, "Improved Drain Current Saturation and Voltage Gain in Graphene-on-Silicon Field Effect Transistors", Scientific Reports, vol 6, 25932, May. 2016
  • 205 Hyun Jun Ahn, Jungmin Moon, Sungho Koh, Yujin Seo, Choong-Ki Kim, Il Cheol Rho, Choon Hwan Kim, Wan Sik Hwang, and Byung Jin Cho, "Very Low Work function ALD-Erbium Carbide (ErC2) Metal Electrode on High-K dielectrics", IEEE Transaction on Electron Devices, vol. 63, no. 7, pp. 2858-2863, Jul. 2016.
  • 204 Jungmin Moon, Hyun Jun Ahn, Yujin Seo, Tae In Lee, Choong-Ki Kim, Il Cheol Rho, Choon Hwan Kim, Wan Sik Hwang, and Byung Jin Cho, “The Work Function Behavior of Aluminum-doped Titanium-Carbide Grown by Atomic Layer Deposition”, IEEE Trans. Electron Devices, vol.63, no. 4, pp. 1423-1427, Apr. 2016.
  • 203 Choong Sun Kim, Seul Ki Hong, Jung-Min Lee, Dong-Soo Kang, Yang-Hann Kim, Byung Jin Cho, and Jung-Woo Choi, "Free-Standing Graphene Thermophone on a Polymer-Mesh Substrate", Small, vol. 12, no. 2, pp 185-189, Jan 2016.
  • 202 Yujin Seo, Sukwon Lee, Seung–heon Chris Baek, Wan Sik Hwang, Hyun–Yong Yu, Seok–Hee Lee, and Byung Jin Cho, "The Mechanism of Schottky Barrier Modulation of Tantalum Nitride/Ge Contacts", IEEE Electron Device Lett., vol. 36, no. 10, pp. 997-1000, Oct. 2015.
  • 201 Hanul Moon, Hyejeong Seong, Woo Cheol Shin, Wontae Park, Mincheol Kim, Seungwon Lee, Jae Hoon Bong, Yong Young Noh, Byung Jin Cho, Seunghyup Yoo, and Sung Gap Im, "Synthesis of ultrathin polymer insulating layers by initiated chemical vapour deposition for low-power soft electronics", Nature Mater., Mar. 2015.
  • 200

    Gwang-Sik Kim, Gwangwe Yoo, Yu Jin Seo, Seung-Hwan Kim, Byung Jin Cho, Changhwan Shin, Jin-Hong Park, and Hyun-Yong Yu, "Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal–Interlayer–n-Germanium Source/Drain Structure", IEEE Electron Device Letters, vol. 37, no. 6, pp. 709-712, Jun. 2016.

  • 199

    Juhan Ahn, Jeong-Kyu Kim, Sun-Woo Kim, Gwang-Sik Kim, Changhwan Shin, Jong-Kook Kim, Byung Jin Cho and Hyun-Yong Yu, "Effect of Metal Nitride on Contact Resistivity of Metal-Interlayer-Ge Source/Drain in Sub-10 nm n-type Ge FinFET", IEEE Electron Device Letters, vol. 37, no. 6, pp. 705-708, Jun. 2016.

  • 198 Kook In Han, Seung Du Kim, Woo Seok Yang, Hyeong Seok Kim, Myunghun Shin, Jong Pil Kim, In Gyu Lee, Byung Jin Cho, and Wan Sik Hwang, "Material characteristics and equivalent circuit models of stacked graphene oxide for capacitive humidity sensors", AIP Advances, vol. 6, pp. 035203, Mar. 2016.
  • 197 Gwang-Sik Kim, Seung-Hwan Kim, Jeong-Kyu Kim, Changhwan Shin, Jin-Hong Park, Krishna C. Saraswat, Byung Jin Cho, and Hyun-Yong Yu, "Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET", IEEE Electron Device Lett., vol. 36, no. 8, Aug. 2015.
  • 196 Choong-Ki Kim, Hyunjun Ahn, Jung Min Moon, Sukwon Lee, Dong-Il Moon, Jeong Soo Park, Byung-Jin Cho, Yang-Kyu Choi, Seok-Hee Lee, "Temperature Control for the Gate Workfunction Engineering of TiC Film by Atomic Layer Deposition", Solid State Electron., vol. 114, pp. 90-93, Dec. 2015.
  • 195 Seul Ki Hong, Sang Chul Jeon, Wan Sik Hwang, and Byung Jin Cho, "Resistance analysis and device design guideline for graphene RF transistors", 2D Materials, vol. 2, no. 3, pp. 034011, July 2015.
  • 194 Dae Yool Jung, Sang Yoon Yang, Hamin Park, Woo Cheol Shin, Joong Gun Oh, Byung Jin Cho, and Sung-Yool Choi, "Interface engineering for high performance graphene electronic devices", Nano Convergence, 2:11, 2015  
  • 193 Chang-Ju Lee, Sang-Bum Kang, Hyeon-Gu Cha, Chul-Ho Won, Seul Ki Hong, Byung Jin Cho, Hongsik Park, Jung-Hee Lee, and Sung-Ho Hahm, “GaN metal–semiconductor–metal UV sensor with multi-layer graphene as Schottky electrodes”, Jpn. J. Appl. Phys., vol. 54, pp. 06FF08, May. 2015.
  • 192 Seung-Yoon Kim, Jong Kyung Park, Wan Sik Hwang, Seung-jun Lee, Ki-Hong Lee, Seung Ho Pyi, and Byung Jin Cho, "Dependence of grain size on the performance of a polysilicon channel TFT for 3D NAND flash memory", J. Nanosci. & Nanotech., vol. 16, no. 5, pp. 5044-5048, May. 2015.
  • 191 Jae Hoon Bong, Seong Jun Yoon, Alexander Yoon, Wan Sik Hwang, and Byung Jin Cho, "Ultrathin graphene and graphene oxide layers as a diffusion barrier for advanced Cu metallization", Appl. Phys. Lett., vol 106, pp.063112, Feb. 2015.
  • 190
    Chunxiang Zhu, B‐J Cho, M‐F Li, "Atomic Layer Deposited High-κ Films and Their Role in Metal-Insulator-Metal Capacitors for Si RF/Analog Integrated Circuit Applications", Chemical Vapor Deposition, vol. 12, no. 2-3, pp. 165-171, 2006.
  • 189

    B-J Cho, J-I Yang, S Nahm, C-H Choi, H-J Lee, H-M Park, S-Y Ryou, "Structural and Microwave Dielectric Properties of ZrO2 Doped Ba(Zn 1/3 Ta 2/3)O3 Ceramics", J. Korean Ceram. Soc., Vol. 38, No. 2, pp117-121, 2001.

  • 188
    HK Ju, BY Hwang, BT Ahn, MJ Kim, WH Choi, BJ Cho, JS Ro, KS Lee, "Chemical Components of Evodia daniellii HEMS", Korean Journal of Pharmacognosy, Vol. 31, No. 3, pp300-305, 2000.
  • 187

    Jeong-Kyu Kim, Gwang-Sik Kim, Hyohyun Nam, Changhwan Shin, Jin-Hong Park,Jong-Kook Kim, Byung Jin Cho, Krishna C. Saraswat, and Hyun-Yong Yu, "The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances", IEEE Electron Device Lett., vol. 35, no. 12, pp. 1185-1187, Dec. 2014.

  • 186 Jeong Hun Mun,Joong Gun Oh, Jae Hoon Bong, Hai Xu, Kian Ping Loh, and Byung Jin Cho, "Wrinkle-Free Graphene with Spatially Uniform Electrical Properties Grown on Hot-Pressed Copper", Nano Research, vol. 8. no. 4, pp. 1075-1080, 2015.
  • 185

    Sang Yoon Yang, Joong Gun Oh, Dae Yool Jung, HongKyw Choi, Chan Hak Yu, Jongwoo Shin, Choon-Gi Choi, Byung Jin Cho, and Sung-Yool Choi, "Metal-Etching-Free Direct Delamination and Transfer of Single-Layer Graphene with a High Degree of Freedom", Small, vol. 11, no. 2, pp. 175-181, Jan. 2015.

  • 184 Gi Woong Shim, Kwonjae Yoo, Seung-Bum Seo, Jongwoo Shin, Dae Yool Jung, Il-Suk Kang, Chi Won Ahn, Byung Jin Cho, and Sung-Yool Choi, "Large-Area Single-Layer MoSe2 and Its van der Waals Heterostructures", ACS Nano, vol.8, no.7, pp. 6655-6662, July 2014.
  • 183 Jinsup Lee, Jinwook Baek, Gyeong Hee Ryu, Mi Jin Lee, Seran Oh, Seul Ki Hong, Bo-Hyun Kim, Seok-Hee Lee, Byung Jin Cho, Zonghoon Lee, and Seokwoo Jeon, “High-Angle Tilt Boundary Graphene Domain Recrystallized from Mobile Hot-Wire assisted Chemical Vapor Deposition System", Nano Lett., vol.14, pp. 4352-4359, June 2014.
  • 182

    Erich Kinder, Hao Lu, Wan Sik Hwang, Byung Jin Cho, Seul-ki Hong, Alan Seabaugh and Susan Fullerton-Shirey, “Field-Controlled Ion Doping of Graphene”, The society for solid-state and electrochemical science and technology (ECS), MA2014-01, 1265, 2014.

  • 181 Ju Hyung We, Sun Jin Kim, and Byung Jin Cho, "Hybrid composite of screen printed inorganic thermoelectric film and organic conducting polymer for flexible thermoelectric power generator", Energy, vol.73, pp. 506-512, Aug. 2014.
  • 180 Jae Hoon Bong, Onejae Sul, Alexander Yoon, Sung-Yool Choi and Byung Jin Cho, "Facile Graphene N-Doping by Wet Chemical Treatment for Electronic Applications", Nanoscale, vol. 6, pp. 8503-8508, May. 2014.
  • 179

    Dong-Hyun Kim, Tae Kyun Kim, Young Gwang Yoon, Byeong-Woon Hwang, Yang-Kyu Choi, Byung Jin Cho, and Seok-Hee Lee, "First Demonstration of Ultra-Thin SiGe-Channel Junctionless Accumulation-Mode (JAM) Bulk FinFETs on Si Substrate with PN Junction-Isolation Scheme", IEEE J. Electron Devices Soc., vol. 2, no. 5, pp. 123-127, Sep. 2014.

  • 178 Joong Gun Oh, Seul Ki Hong, Choong-Ki Kim, Jae Hoon Bong, Jongwoo Shin, Sung-Yool Choi and Byung Jin Cho, "High Performance Graphene Field Effect Transistors on an Aluminum Nitride Substrate with High Surface Phonon Energy", Appl. Phys. Lett., vol. 104, pp. 193112, May 2014.
  • 177

    Seung Min Song, Taek Yong Kim, One Jae Sul, Woo Cheol Shin, and Byung Jin Cho, "Improvement of graphene-metal contact resistance by introducing edge contacts at graphene under metal", Appl. Phys. Lett., vol. 104, pp. 183506, May 2014.

  • 176

    Sun Jin Kim, Ju Hyung We and Byung Jin Cho, "A Wearable Thermoelectric Generator Fabricated on a Glass Fabric", Energy Environ. Sci., vol. 7, pp. 1959, Jun. 2014.

  • 175

    Kawon Oum, Thomas Lenzer, Mirko Scholz, Dae Yool Jung, Onejae Sul, Byung Jin Cho, Jens Lange, and Andreas Muller, "Observation of Ultrafast Carrier Dynamics and Phonon Relaxation of Graphene from the Deep-Ultraviolet to the Visible Region", J. Phys. Chem C., vol. 118, pp. 6454-6461, Mar. 2014.

  • 174

    J. K. Park, K.-H. Lee, S. H. Pyi, S.-H. Lee, and B. J. Cho, "Improvement of the multi-level cell performance by a Soft Program Method in Flash Memory Devices", Solid State Electron., vol. 94, pp. 86-90, Mar. 2014.

  • 173

    Seung Min Song , Jae Hoon Bong, and Byung Jin Cho, "Work Function Tuning of Metal/Graphene Stack Electrode", Appl. Phys. Lett., vol. 104, pp. 083512, Feb. 2014.

  • 172

    S. Chandramohan, Kang Bok Ko, Jong Han Yang, Beo Deul Ryu, Y. S. Katharria, Taek Yong Kim, Byung Jin Cho, and Chang-Hee Hong, "Performance evaluation of GaN light-emitting diodes using transferred graphene as current spreading layer", J. Appl. Phys., vol. 115, pp. 054503 - 054503-7, Feb. 2014.

  • 171

    TaeShik Yoon, Jeong Hun Mun, Byung Jin Cho and Taek-Soo Kim, "Penetration and lateral diffusion characteristics of polycrystalline graphene barriers", Nanoscale, vol. 6, no. 1, pp 151-156, Jan. 2014.

  • 170

    S. J. Kim, J. H. We, J. S. Kim, G. S. Kim, and B. J. Cho, "Thermoelectric Properties of P-type Sb2Te3 Thick Film Processed by a Screen-printing technique and a Subsequent Annealing Process", J. Alloy. Compd., vol. 582, no. 5, pp. 177-180, Jan. 2014.

  • 169

    O. J. Sul, J. H. Bong, A. Yoon, and B. J. Cho, "Improvement of gate dielectric integrity using O2 plasma treatment prior to atomic layer deposition on chemical vapor deposition grown graphene", J. Nanosci. & Nanotech., vol. 14, pp 1-4, 2014.

  • 168

    Woo Cheol Shin , Taeshik Yoon , Jeong Hun Mun , Taek Yong Kim , Sung-Yool Choi , Taek-Soo Kim, and Byung Jin Cho, "Doping Suppression and Mobility Enhancement of Graphene Transistors Fabricated using an Adhesion Promoting Dry Transfer Process", Appl. Phys. Lett., vol. 103, pp. 243504, Dec. 2013.

  • 167

    T. K. Kim, D. H. Kim, Y. G. Yoon, J. M. Moon, B. W. Hwang, D-I. Moon, G. S. Lee, D. W. Lee, D. E. Yoo, H. C. Hwang, J. S. Kim, Y-K. Choi, B. J. Cho, and S-H. Lee, "First Demonstration of Junctionless Accumulation-Mode Bulk FinFETs with Robust Junction-Isolation", IEEE Electron Device Lett., vol. 34, no. 12, Dec. 2013.

  • 166

    W. C. Shin, J. h. Bong, S. Y. Choi, and B. J. Cho, "Functionalized Graphene as an Ultrathin Seed Layer for the Atomic Layer Deposition of Conformal High-k Dielectrics on Graphene", ACS Applied Materials & Interfaces, vol. 5, no. 22, pp 11515-11519, Oct. 2013.

  • 165

    Seung Min Song and Byung Jin Cho, "Contact resistance in graphene channel transistors", Carbon Lett., vol. 14, no. 3, pp 162-170, Aug. 2013.

  • 164

    Seul Ki Hong, Seung Min Song, Onejae Sul and Byung Jin Cho, "Reduction of metal-graphene contact resistance by direct growth of graphene over metal", Carbon Lett., vol. 14, no. 3, pp 171-174, Aug. 2013.

  • 163

    Alexander V. Klekachev, Sergey N. Kuznetsov, Inge Asselberghs, Mirco Cantoro, Jeong Hun Mun, Byung Jin Cho, Andre L. Stesmans, Marc M. Heyns, and Stefan De Gendt, "Graphene as anode electrode for colloidal quantum dots based light emitting diodes", Appl. Phys. Lett., vol. 103, pp. 043124-1-043124-4, Jul. 2013.

  • 162

    J. H. Mun and B. J. Cho, "Synthesis of Monolayer Graphene having Negligible Amount of Wrinkles by Stress Relaxation", Nano Lett., vol. 13, no. 6, pp 2496-2499, May. 2013.

  • 161

    J. H. We, S. J. Kim, G. S. Kim, and B. J. Cho, "Improvement of thermoelectric properties of screen-printed Bi2Te3 thick film by optimization of the annealing process", J. Alloy. Compd., vol. 552, pp. 107-110, Mar. 2013 .

  • 160

    S. Chandramohan, J. H. Kang, B. D. Ryu, J. H. Yang, S. J. Kim, H. S. Kim, J. B. Park, T. Y. Kim, B. J. Cho, E. K. Suh, and C. H. Hong, "Impact of Interlayer Processing Conditions on the Performance of GaN Light-Emitting Diode with Specific NiOx/Graphene Electrode", ACS Appl. Mater. Interfaces, vol. 5, no. 3, pp 958-964, Jan. 2013.

  • 159

    W. S. Hwang, M. Remskar, R. Yan, T. Kosel, J. K. Park, B. J. Cho, W. Haensch, H. Xing, A. Seabaugh, and D. Jena, "Comparative Study of Chemically Synthesized and Exfoliated Multilayer MoS2 Field Effect Transistors", Appl. Phys. Lett., vol. 102, pp. 043116, Jan. 2013.

  • 158

    S. J. Kim, J. H. We, G. S. Kim, and B. J. Cho, "Simultaneous Measurement of the Seebeck Coefficient and Thermal Conductivity in the Cross-Sectional Direction of Thermoelectric Thick Film", J. Appl. Phys., vol. 112, pp. 104511 - 104511-5, Nov. 2012.

  • 157

    J. J. Lee, Y. S. Shin, J. Y. Choi, H S. Kim, S. J. Hyun, S. Y. Choi, B. J. Cho, and S. H. Lee, "Reduction of charge trapping in HfO2 film on a Ge substrate by trimethylaluminum pretreatment", Phys. Status Solidi RRL 6, No. 11, pp. 439-441, Nov. 2012.

  • 156

    J. H. Mun, and B. J. Cho, "Physical-Gap-Channel Graphene Field Effect Transistor with High On/Off Current Ratio for Digital Logic Applications", Appl. Phys. Lett., vol. 101, pp. 143102-1-143102-4, Oct. 2012.

  • 155

    S. K. Hong, K. Y. Kim, T. Y. Kim, J. H. Kim, S. W. Park, J. H. Kim, and B. J. Cho, "Electro-Magnetic Interference (EMI) Shielding Effectiveness of Monolayer Graphene", Nanotechnol., vol. 23, no. 45, pp. 455704-1-455704-5 , Nov. 2012.

  • 154

    J. K. Park, S. H. Lee, J. S. Oh, K. H. Lee, S. H. Pyi, and B. J. Cho, "Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer", Appl. Phys. Express, vol. 5, pp. 081102-1~081102-3, Aug. 2012.

  • 153

    W. C. Shin, T. Y. Kim, O. J. Sul, and B. J. Cho, "Seeding atomic layer deposition of high-k dielectric on graphene with ultrathin poly(4-vinylphenol) layer for enhanced device performance and reliability", Appl. Phys. Lett., vol. 101, pp. 033507-1-033507-4, Jul. 2012.

  • 152

    S. M. Song, J. K. Park, W. J. Seol, and B. J. Cho, “Determination of Work Function of Graphene under a Metal Electrode and Its Role in Contact Resistace”, Nano Lett., vol.12, no.8, pp 3887-3892, Jul. 2012.

  • 151

    J. H. Mun, S. K. Lim, and B. J. Cho, “Local Growth of Graphene by Ion Implantation of Carbon in a Nickel Thin Film followed by Rapid Thermal Annealing”, J. Electrochem. Soc., vol. 159, no. 6, pp. G89-G92, 2012.

  • 150

    T. S. Yoon, W. C. Shin, T. Y. Kim, J. H. Mun, T. S. Kim, and B. J. Cho “Direct Measurement of Adhesion Energy of Monolayer Graphene As-Grown on Copper and Its Application to Renewable Transfer Process”, Nano Lett., Feb. 2012.

  • 149

    H. M. So, J. H. Mun, G. S. Bang, T. Y. Kim, B. J. Cho, C. W. Ahn, “Identifying and quantitating defects on chemical vapor deposition grown graphene layers by selected electrochemical deposition of Au nanoparticles”, Carbon Lett., vol. 13, no. 1, pp. 56-59, 2012.

  • 148

    S. K. Hong, S. M. Song, O. J. Sul, and B. J. Cho, " Carboxylic Group as the Origin of Electrical Performance Degradation during the Transfer Process of CVD Growth Graphene ", J. Electrochem. Soc., vol 159, no. 4, pp. K107-K109, 2012.

  • 147

    B. J. Cho, "Special Theme 기고: 국내외 열전 소자 연구동향", 전기전자재료학회지, vol. 25, no. 2, pp. 51-60, Feb. 2012.

  • 146

    Ju Hyung We, Heon Bok Lee, Sun Jin Gim, Gyung Soo Kim, Kukjoo Kim, Kyung Cheol Choi, Onejae Sul, and Byung Jin Cho, "Development of a Measurement Method for the Thermal Conductivity of a Thick Film prepared by a Screen Printing Technique", J. Electron. Mat., Vol. 41, No. 6, 1170-1176, 2012.

  • 145

    J. K. Park, S. M. Song, J. H. Mun, and B. J. Cho, “Graphene Gate Electrode for MOS Structure-Based Electronic Devices”, Nano Lett., vol. 11, no.12, pp. 5383-5386, Nov. 2011.

  • 144

    J. G. Oh, Y. S. Shin, W. C. Shin, O. J. Sul, and B. J. Cho, "Dirac Voltage Tunability by Hf1-xLaxO Gate Dielectric Composition Modulation for Graphene Field Effect Devices", Appl. Phys. Lett., vol 99, pp. 193503-1-193503-3, Nov. 2011.

  • 143

    S. K. Hong, J. E. Kim, S. O. Kim, and B. J. Cho, "ANALYSIS ON SWITCHING MECHANISM OF GRAPHENE OXIDE RESISTIVE MEMORY DEVICE ", Virtual J. Nanoscale Sci. & Technol., Sep. 2011.

  • 142

    S. K. Hong, J. E. Kim, S. O. Kim, and B. J. Cho, "ANALYSIS ON SWITCHING MECHANISM OF GRAPHENE OXIDE RESISTIVE MEMORY DEVICE ", J. Appl. Phys., vol. 110, no. 4, pp. 044506-1-044506-5, Aug. 2011.

  • 141

    J. K. Park, Y. M. Park, S. H. Lee, S. K. Lim, J. S. Oh, M. S. Joo, K. Hong, and B. J. Cho, " Lanthanum-Oxide-Doped Nitride Charge Trap Layer for a TANOS Memory Device”, IEEE Trans. Electron Devices, vol. 58, no. 10, pp. 3314-3320, Oct. 2011.

  • 140

    W. C. Shin, S. Seo, and B. J. Cho, “Highly air-stable electrical performance of graphene field effect transistors by interface engineering with amorphous fluoropolymer”, Virtual J. NanoScale Sci. & Technol., vol 23, no. 16, Apr. 2011.

  • 139

    Y. S. Shin, K. K. Min, S. H. Lee, S. K. Lim, J. S. Oh, K. J. Lee, K. Hong, and B. J. Cho, “Crystallized HfLaO Embedded Tetragonal ZrO2 for Dynamic Random Access Memory Capacitor Dielectrics”, Appl. Phys. Lett., vol.98, no. 17, pp. 173505-1-173505-3, Apr. 2011.

  • 138

    W. C. Shin, S. Seo, and B. J. Cho, “Highly Air-Stable Electrical Performance of Graphene Field Effect Transistors by Interface Engineering with Amorphous Fluoropolymer”, Appl. Phys. Lett., vol 98, no. 15, pp. 153505-1-153505-3, Mar. 2011.

  • 137

    J. K. Park, Y. M. Park, S. H. Lee, S. K. Lim, J. S. Oh, M. S. Joo, K. Hong, and B. J. Cho, "Mechanism of Date Retention Improvement by High Temperature Annealing of Al2O3 Blocking Layer in Flash Memory Device", Jpn. J. Appl. Phys., vol. 50, no. 4, pp. 04DD07-1-04DD07-5, Apr. 2011.

  • 136

    H. B. Lee, J. H. We, H. J. Yang, K. J. Kim, K. C. Choi, and B. J. Cho, “Thermoelectric properties of screen-printed ZnSb film”, Thin Solid Films, Vol. 519, No. 16, 5441, 2011.

  • 135

    H. B. Lee, H. J. Yang, J. H. We, K. J. Kim, K. C. Choi, and B. J. Cho, "Thin-Film Thermoelectric Module for Power Generator Applications Using a Screen-Printing Method", J. Electron. Mat., vol. 40, no. 5, pp. 615-619, Jan. 2011.

  • 134

    H. Y. Jeong, J. Y. Kim, J. W. Kim, J. O. Hwang, J. E. Kim, J. Y. Lee, T. H. Yoon, B. J. Cho, S. O. Kim, R. S. Ruoff, and S. Y. Choi, “Graphene Oxide Thin Films for Flexible Nonvolatile Memory Applications”, Nano Lett., vol. 10, no. 11 pp. 4381-4386, Oct. 2010.

  • 133

    W. C. Shin, H. U. Moon, S. H. Yoo, Y. Li and B. J. Cho, "Low-Voltage High-Performance Pentacene Thin-Film Transistors with Ultrathin PVP/High-k HfLaO Hybrid Gate Dielectric", IEEE Electron Device Lett., vol. 31, no. 11, pp. 1308-1310, Sep. 2010.

  • 132

    S. M. Song and B. J. Cho, “Investigation Of Interaction Between Graphene And Dielectrics”, Nanotechnol., vol. 21, no. 33, pp. 335706-1-335706-6, Jul. 2010.

  • 131

    J. K. Park, Y. M. Park, M. H. Song, S. K. Lim, J. S. Oh, M. S. Joo, K. Hong, and B. J. Cho, “Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device ", Appl. Phys. Express, vol. 3, no. 20, pp. 091501-1-091501-3, Aug. 2010.

  • 130

    S. K. Hong, J. E. Kim, S. O. Kim, S. Y. Choi, and B. J. Cho, "Flexible Resistive Switching Memory Device Based on Graphene Oxide", IEEE Electron Device Lett., vol. 31, no. 9, pp. 1005-1007, Sep. 2010.

  • 129

    J. K. Park, Y. M. Park, S. K. Lim, J. S.Oh, M. S. Joo, K. Hong, and B. J. Cho, "Improvement of Memory Performance by High Temperature Annealing of the Al2O3 Blocking Layer in a Charge-Trap Type Flash Memory Device", Appl. Phys. Lett., vol. 96, no. 22, pp. 222902-1-222902-3, May. 2010.

  • 128

    S. Wang, J. Pu, D. S. H. Chan, B. J. Cho, and K. P. Loh, "Wide Memory Window In Graphene Oxide Charge Storage Nodes ", Appl. Phys. Lett., vol. 96, no. 14, pp. 143109-1-143109-3, Apr. 2010.

  • 127

    Y. M. Park, J. K. Park, M. H. Song, S. K. Lim, J. S. Oh, M. S. Joo, K. Hong, and B. J. Cho, "Structural and Compositional Dependence of Gadolinium-Aluminum Oxide for the Application of Charge-Trap-Type Non-Volatile Memory Devices", Appl. Phys. Lett., vol. 96, no. 5, pp. 052907-1-052907-3, Feb. 2010.

  • 126

    J. H. Seo, B. J. Kang, J. H. Mun, S. K. Lim and B. J. Cho, “Effect of a Surface Pre-Treatment on Graphene Growth using a SiC Substrate”, Microelectron. Eng., vol. 87, no. 10, pp 2002-2007, Oct. 2010.

  • 125

    J. H. Mun, C. Y. Hwang, S. K. Lim and B. J. Cho,“Optical Reflectance Measurement Of Large-Scale Graphene Layers Synthesized On Nickel Thin Film By Carbon Segregation”, Carbon, vol. 48, no. 2, pp. 447-451, Feb. 2010.

  • 124

    L. Zhang, W. He, D. S. H. Chan, and B. J. Cho, “High-Performance MIM Capacitors Using HfLaO-Based Dielectrics", IEEE Electron Device Lett., vol. 31, no. 1, pp. 17-19, Jan. 2010.

  • 123

    B. J. Kang, J. H. Mun, C. Y. Hwang and B. J. Cho, “Mono-Layer Graphene Growth on Sputtered Thin Film Platinum”, Virtual J. Nanoscale Sci. & Technol., vol. 20, no. 23, Dec. 2009.

  • 122

    W. He, J. Pu, D. S. H. Chan, and B. J. Cho, “Performance in Charge-Trap Flash Memory Using Lanthanum-Based High-k Blocking Oxide”, IEEE Trans. Electron Devices, vol. 56, no. 11, pp. 2746-2751, Nov. 2009.

  • 121

    J. Pu, D. S. H. Chan, S. J. Kim, and B. J. Cho,“Aluminum-Doped Gadolinium Oxides as Blocking Layer for Improved Charge Retention in Charge-Trap-Type Nonvolatile Memory Devices”, IEEE Trans. Electron Devices, vol. 56, no. 11, pp. 2739-2745, Nov. 2009.

  • 120

    B. J. Kang, J. H. Mun, C. Y. Hwang and B. J. Cho, “Mono-Layer Graphene Growth on Sputtered Thin Film Platinum”, J. Appl. Phys., vol. 106, no. 10, pp. 104309-1-104309-6, Nov. 2009.

  • 119

    W. He, L. Zhang, D. S. H. Chan, and B. J. Cho, “Cubic-Structured HfO2 With Optimized Doping of Lanthanum for Higher Dielectric Constant”, IEEE Electron Device Lett., vol. 30, no. 6, pp. 623-625, Jun. 2009.

  • 118

    J. W. Han, S. W. Ryu, C. J. Kim, S. J. Choi, S. H. Kim, J. H. Ahn, D. H. Kim, K. J. Choi, B. J. Cho, J. S. Kim, K. H. Kim, G. S. Lee, J. S. Oh, M. H. Song, Y. C. Park, J. W. Kim, and Y. K. Choi,“Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried Si1-yCy Substrate for Multifunctioning Flash Memory and 1T-DRAM”, IEEE Trans. Electron Devices, vol. 56, no. 4, pp.641-647, Apr. 2009.

  • 117

    S. H. Lee, P. Majhi, J. W. Oh, B. Sassman, C. Young, A. Bowonder, W. Y. Loh, K. J. Choi, B. J. Cho, H. D. Lee, P. Kirsch, H. R. Harris, W. Tsai, S. Datta, H. H. Tseng, S. K. Banerjee, and R. Jammy, “Demonstration of Lg ∼ 55 nm pMOSFETs With Si/Si0.25Ge0.75/Si Channels, High Ion/Ioff (> 5 × 104), and Controlled Short Channel Effects (SCEs)”, IEEE Electron Device Lett., vol. 29, no. 9, pp. 1017-1020, Sep. 2008.

  • 116

    W. S. Hwang, D. S. H. Chan, and B. J. Cho, “Metal Carbides for Band-Edge Work Function Metal Gate CMOS Devices”, IEEE Trans. Electron Devices, vol. 55, no. 9, pp. 2469-2474, Sep. 2008.

  • 115

    G. Zhang, W. S. Hwang, S. H. Lee, B. J. Cho, and W. J. Yoo, “Endurance Reliability of Multilevel-Cell Flash Memory Using a ZrO2/Si3N4 Dual Charge Storage Layer”, IEEE Trans. Electron Devices, vol. 55, no. 9, pp. 2361-2369, Sep. 2008.

  • 114

    P. Majhi, P. Kalra, R. Harris, K. J. Choi, D. Heh, J. Oh, D. Kelly, R. Choi, B. J. Cho, S. Banerjee, W. Tsai, H. Tseng, and R. Jammy, “Demonstration of High-Performance PMOSFETs Using Si-SixGe1-x-Si Quantum Wells With High-κ/Metal-Gate Stacks”, IEEE Electron Device Lett., vol. 29, no. 1, pp. 99-101, Jan. 2008.

  • 113

    W. S. Hwang, B. J. Cho, D.S.H. Chan, S. W. Lee, and W. J. Yoo, “Effects of Volatility of Etch By-products on Surface Roughness During Etching of Metal Gates in Cl2”, J. Electrochem. Soc., vol. 155, no. 1, pp. H6-H10, Jan. 2008.

  • 112

    W. He, D. S. H. Chan, S. J. Kim, Y. S. Kim, S. T. Kim, and B. J. Cho, “Process and Material Properties of HfLaOx Prepared by Atomic Layer Deposition”, J. Electrochem. Soc., vol. 155, no. 10, pp. G189-G193, Aug. 2008.

  • 111

    J. Pu, S. J. Kim, S. H. Lee, Y. S. Kim, S. T. Kim, K. J. Choi and B. J. Cho, "Carbon Doped Polysilicon Floating Gate for Improved Data Retention and P/E Window of Flash Memory ", IEEE Electron Device Lett., vol. 29, no. 7, pp. 688-690, Jul. 2008.

  • 110

    J. Pu, S. J. Jim, Y. S. Kim and B. J. Cho, “Evaluation of Gadolinium Oxide as a Blocking Layer of Charge Trap Flash Memory Cell”, Electrochem. and Solid-State Let., vol. 11, no. 9, pp. H252-H254, Jun. 2008.

  • 109

    L. Zhang, W. He, D. S.H.Chan, B. J. Cho, "Multi-layer high-k interpoly dielectric for floating gate flash memory devices", Solid State Electron., vol.52, pp.564-570, Apr. 2008.

  • 108

    H. Zang, S. J. Lee, W. Y. Loh, J. Wang, M. B. Yu, G. Q.Lo, D. L. Kwong, and B. J. Cho, “Application of dopant segregation to metal-germanium-metal photodetectors and its dark current suppression mechanism”, Appl. Phys. Lett., vol. 92, pp.051110-1-051110-3, Feb. 2008.

  • 107

    H. Zang, S. J. Lee, W. Y. Loh, J. Wang, K. T. Chua, M. B. Yu, B. J. Cho, G. Q. Lo, and D. L. Kwong, “Dark-current suppression in metal-germanium-metal photodetectors through dopant-segregation in NiGe-Schottky Barrier”, IEEE Electron Device Lett., vol. 29, no. 2, pp. 161-164, Feb. 2008.

  • 106

    H. Zang, W. Y. Loh, J. D. Ye, G. Q. Lo, and B. J. Cho, "Tensile-Strained Germanium CMOS Integration on Silicon", IEEE Electron Device Lett., vol. 28, no. 12, pp. 1117-1119, Dec. 2007.

  • 105

    W. S. Hwang, B. J. Cho, D. S. H. Chan, and W. J. Yoo, "Low energy N2 ion bombardment for removal of (HfO2)x(SiON)1-x in dilute HF", J. Vacuum Sci. and Technol. -Section A, vol. 25, no. 4, pp. 1056-1061, Jul. 2007.

  • 104

    X. Chen, Y. F. Lu, Y.H. Wu, B. J. Cho, L.J. Tang, D. Lu and J.R. Dong, "Correlation between optical properties and Si nanocrystal formation of Si rich Si oxide films prepared by plasma enhanced chemical vapor deposition", Appl. Surf. Sci., vol. 253, no. 5, pp. 2718-2726, Dec. 2007.

  • 103

    H.J.Oh, K.J.Choi, W.Y.Loh, T.Htoo, S.J.Chua, and B. J. Cho, "Integration of GaAs epitaxial layer to Si-based substrate using Ge condensation and low-temperature migration enhanced epitaxy techniques", J. Appl. Phys., vol. 102, no.5, pp. 054306-1-054306-6, Sep. 2007.

  • 102

    C.Shen, J.Pu,M.-F.Li, and B.J.Cho, "P-Type Floating Gate for Retention and P/E Window Improvement of Flash Memory Devices", IEEE Trans. Electron Devices, vol. 54, no.8, pp.1910-1917, Aug. 2007.

  • 101

    G.K.Dalapati, Y.Tong, W.Y.Loh, H.K.Mun, and B.J.Cho, "Electrical and Interfacial Characterization of Atomic Layer Deposited High-K Gate Dielectrics on GaAs for Advanced CMOS Devices", IEEE Trans. on Electron. Devices, vol. 54, no. 8, pp. 1831-1837, Aug. 2007.

  • 100

    D.Maji, S.P.Duttagupta, V.R.Rao, C.C.Yeo, and B.J.Cho, "Border-Trap CharacteNrization in High-K Strained-Si MOSFETs," IEEE Electron Device Lett., vol. 28, no.8, pp. 731-711, Aug. 2007.

  • 99

    G.K.Kalapati, Y.Tong, W.Y.Loh, H.K.Mun, and B.J.Cho, "Impact of interfacial layer control using Gd2O3 in HfO2 gate dielectric," Appl. Phys. Lett., vol. 90, p. 183510, May. 2007.

  • 98

    S. J. Whang, Sungjoo Lee, W. F. Yang, B. J Cho, and D. L. Kwong, “Study on the synthesis of high quality single crystalline SixGex nanowire and its transport properties”, Appl. Phys. Lett., vol. 91, p.072105, 2007.

  • 97

    S. J. Whang, Sungjoo Lee, W. F. Yang, B. J. Cho, Y. F. Liew, D. Z. Chi, and D. L. Kwong, “B-doping of vapor-liquid-solid grown Au-catalyzed and Al-catalyzed Si nanowires: effects of B2H6 gas during Si nanowires growth and B-doping by post-synthesis in-situ plasma process”, Nanotechnolgy, vol. 18, no. 27, p.275302, 2007.

  • 96

    S. J. Whang, S. J. Lee, W. F. Yang, B. J. Cho, Y. F. Liew, and D. L. Kwong, "Complementary Metal-Oxide-Semiconductor compatible Al-catalyzed silicon nanowires," Electrochem. and Solid-State Lett., vol. 10, no. 6, pp. E11-E13, Mar. 2007. (Also selected to Virtual J. Nanoscale sci. & technol., Apr. 2, 2007 issue)

  • 95

    W. S. Hwang, B. J. Cho, and D. S. H. Chan, V. Bliznetsov, and W. J. Yoo, "Effects of SiO2/Si3N4 hard masks on etching properties of metal gates," J. Vacuum sci. & technol. B, vol. B 24 (6), pp. 2689-2694, Nov/Dec 2006.

  • 94

    M. S. Joo, C. S. Park, B. J. Cho, N. Balasubramanian, and D. L. Kwong, "Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack," J. Vacuum sci. & technol. B, vol. B24 (3), pp. 1341-1343, May/Jun 2006.

  • 93

    C. C. Yeo, B. J. Cho, M. H. Lee, C. W. Liu, K. J. Choi and T. W. Lee, "Thermal stability study of Si cap/ultrathin Ge/Si and strained Si/Si1-xGex/Si nMOSFETs with HfO2 gate dielectric," Semiconductor sci. and technol., vol. 21, pp. 665-669, May. 2006.

  • 92

    F.Gao, S. J. Lee, R. Li, B. J. Cho, S. Balakumar, Chih-Hang Tung, D. Z. Chi, and D. L. Kwong, "SiGe on Insulator Metal-Oxide-Semiconductor-Field-Effect-Transistor integrated with Schottky Source/Drain and HfO2/TaN Gate Stack," Electrochem. and Solid-State Lett., vol. 9, no. 7, pp. G222-G224, Jul. 2006.

  • 91

    Y. N. Tan, W. K. Chim, W. K. Choi, M. S. Joo, and B. J. Cho, "Hafnium Aluminum Oxide as charge storage and blocking layers in SONOS type Non-volatile memory for high speed operation," IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 654-662, Apr. 2006.

  • 90

    C. X. Zhu, B. J. Cho, and M. F. Li, "Atomic-Layer-Deposited High-k Films and the Role in MIM Capacitors for Si RF/Analog IC Applications (Invited)," Chemical Vapor Deposition, vol. 12, no. 2/3, pp. 165-171, 2006.

  • 89

    C. H. Poon, L. S. Tan, B. J. Cho, and A. Y. Du, "Dopant loss mechanism in n+/p germanium junctions during rapid thermal annealing," J. Electrochem. Soc., vol. 152, no. 12, pp. G895-G899, Dec. 2005.

  • 88

    M. S. Joo, B. J. Cho, N. Balasubramanian, and D. L. Kwong, "Stoichiometry dependence of Fermi-level pinning in fully silicided (FUSI) NiSi gate on high-K dielectric," IEEE Electron Device Lett., vol. 26, no. 12, pp. 882-884, Dec. 2005.

  • 87

    M. B. Yu, Y. Z. Xiong, S. J. Kim, S. Balakumar, C. Zhu, M. F. Li, B. J. Cho, G. Q. Lo, N. Balasubramanian, and D. L. Kwong, "Integrated high K (K~19) MIM capacitor with Cu/Low-K interconnects for RF application," IEEE Electron Device Lett., vol. 26, no. 11, pp. 793-795, Nov. 2005.

  • 86

    C. C. Yeo, B. J. Cho, F. Gao, S. J. Lee, M. H. Lee, C-Y. Yu, C. W. Liu, L. J. Tang, and T. W. Lee, "Electron mobility enhancement using ultrathin pure Ge on Si substrate," IEEE Electron Device Lett., vol. 26, no. 10, pp. 761-763, Oct. 2005.

  • 85

    C. S. Park and B. J. Cho, "Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning," IEEE Electron Device Lett., vol. 26, no. 11, pp. 796-798, Nov. 2005.

  • 84

    S. J. Kim, B. J. Cho, M. B. Yu, M. F. Li, Y. Z. Xiong, C. Zhu, A. Chin and D. L. Kwong, "Metal-insulator-metal RF bypass capacitor using niobium oxide (Nb2O5) with HfO2/Al2O3 barriers," IEEE Electron Device Lett., vol. 26, no. 9, pp. 625-627, Sep. 2005.

  • 83

    X. Chen, Y. Lu, L. J. Tang, Y. H. Wu, B. J. Cho, S. J. Xu, J. R. Dong, and W. D. Song, "Annealing and oxidation of silicon oxide films prepared by plasma-enhanced chemical vapor depositioin," J. Appl. Phys., vol. 97, no. 1, p. 1 Jan. 2005.

  • 82

    W. Y. Loh, B. J. Cho, M. S. Joo, M. F. Li, D. S. H. Chan, S. Mathew, and D. L. Kwong, "Charge Trapping and Breakdown Mechanism in HfAlO/TaN Gate Stack Analyzed using Carrier Separation," IEEE Trans. Dev. Mat. Rel., vol. 4, no. 4, pp. 696-703, Dec. 2004.

  • 81

    C. S. Park, B. J. Cho, and D. L. Kwong, "MOS characteristics of substituted Al gate on high-K dielectric," IEEE Electron Device Lett., vol. 25, no. 11, pp. 725-727, Nov. 2004.

  • 80

    M. S. Joo, B. J. Cho, N. Balasubramanian, and D. L. Kwong, "Thermal instability of effective work function in metal/high-K stack and its material dependence," IEEE Electron Device Lett., vol. 25, no. 11, pp. 716-718, Nov. 2004.

  • 79

    S. J. Ding, H. Hu, C. Zhu, M. F. Li, S. J. Kim, B. J. Cho, D. S. H. Chan, M. B. Yu, A. Y. Du, A. Chin, and D. L. Kwong, "Evidence and understanding of atomic layer deposited HfO2-Al2O3 laminate MIM capacitors outperforming sandwich counterparts," IEEE Electron Device Lett., vol. 25, no. 10, pp. 681-683, Oct. 2004.

  • 78

    C. S. Park, B. J. Cho, and D. L. Kwong, "MOS characteristics of synthesized HfAlON/HfO2 stack using AlN/HfO2," IEEE Electron Device Lett., vol. 25, no. 9, pp. 619-621, Sep. 2004.

  • 77

    S. J. Kim, B. J. Cho, M. F. Li, S. J. Ding, C. Zhu, M. B. Yu, B. Narayanan, A. F. Chin, and D. L. Kwong, "Improvement of voltage linearity in high-K MIM capacitors using HfO2/SiO2 stacked dielectric," IEEE Electron Device Lett., vol. 25, no. 8, pp. 538-540, Aug. 2004.

  • 76

    C. S. Park, B. J. Cho, and D.-L. Kwong, "Thermally Stable Fully Silicided Hf-Silicide Metal Gate Electrode," IEEE Electron Device Lett., vol. 25, no. 6, pp. 372-374, Jun. 2004.

  • 75

    C. H. Poon, L. S. Tan, B. J. Cho, K. T. Ng, M. Bhat, and L. Chan, "Electrical Evaluation of Laser Annealed Junctions by Hall Measurements," Thin Solid Films, vol. 462-463, pp. 72-75, Sep. 2004.

  • 74

    X. Y. Chen, Y. H. Lu, Y. H. Wu, B. J. Cho, W. D. Song, and D. Y. Dai, "Optical properties of SiOx nanostructured films by pulsed laser deposition at different substrate temperatures," J. Appl. Phys., vol. 96, pp. 3180-3186, 15 Sep. 2004.

  • 73

    X. Y. Chen, Y. F. Lu, Y. H. Wu, B. J. Cho, B. J. Yang, and Y. F. Liew, "Laser annealing of silicon nanocrystal films prepared by pulsed-laser annealing of silicon nanocrystal films prepared by pulsed-laser deposition," J. Vacuum sci. & technol. B, vol. B22, pp. 1731-1737, Jul. 2004.

  • 72

    Y. N. Tan, W. K. Chim, B. J. Cho, and W. K. Choi, "Over-erase phenomenon in SONOS-type Flash memory and its minimization using a hafnium oxide charge storage layer," IEEE Trans. Electron Devices, vol. 51, no. 7, pp. 1143-1147, Jul. 2004.

  • 71

    Y. N. Tan, W. K. Chim, B. J. Cho, and W. K. Choi, "A Novel MONOS-type Flash Memory Using a High-k HfAlO Charge Trapping Layer," Electrochem. and Solid-State Lett., vol. 7, no. 9, pp. G198-G200, Sep. 2004.

  • 70

    C. S. Park, B. J. Cho, N. Balasubramanian, and D.-L. Kwong, "Feasibility Study of Using Thin Aluminum Nitride Film as A Buffer Layer for Dual Metal Gate Process," Thin Solid Films, vol. 462-463, pp. 15-18, Sep. 2004.

  • 69

    N. Wu, Q. Zhang, C. Zhu, C. C. Yeo, S. J. Whoang, D. S. H. Chan, M. F. Li, and B. J. Cho, "Effect of surface NH3 anneal on physical and electrical properties of MOCVD HfO2 films on Ge substrate," Appl. Phys. Lett., vol. 84, no. 19, pp. 3741-3743, May. 2004.

  • 68

    C. C. Yeo, M. S. Joo, B. J. Cho, and S. J. Whoang, "Effect of Annealing on the Composition and Structure of HfO2 and Nitrogen-Incorporated HfO2," Thin Solid Films, vol. 462-463, pp. 90-95, Sep. 2004.

  • 67

    S. J. Ding, H. Hu, H. F. Lim, S. J. Kim, X. F. Yu, C. Zhu, M. F. Li, B. J. Cho, D. S. H. Chan, S. C Rustagi, M. B. Yu, A. Chin, and D.-L. Kwong, "RF, DC and Reliability Characteristics of Atomic Layer Deposited HfO2-Al2O3 Laminate MIM Capacitors for Si RF IC Applications," IEEE Trans. Electron Devices. vol. 51, no. 6, pp. 886-894, Jun. 2004.

  • 66

    M.Balasubramanian, L. K. Bera, S. Mathew, N. Balasubramanian, V. Lim, M. S. Joo, and B. J. Cho, "Wet etching characteristics and surface morphology evaluation of MOCVD grown HfO2 film," Thin Solid Films, vol. 462-463, pp. 101-105, Sep. 2004.

  • 65

    S. Mathew, L. K. Bera, N. Balasubramanian, M. S. Joo, and B. J. Cho, "Channel mobility degradation and charge trapping in high-K/metal gate NMOSFETs," Thin Solid Films, vol. 462-463, pp. 11-14, Sep. 2004.

  • 64

    Y. P. Zeng, Y. F. Lu, Z. X. Zhen, W. X. Sun, T. Yu, L. Liu, J. N. Zeng, B. J. Cho, and C. H. Poon, "Raman spectroscopy investigation on excimer laser annealing and thickness determination of nanoscale amorphous silicon," Nanotechnol., vol. 15, no. 5, pp. 658-662, May. 2004.

  • 63

    D. S. Yu, C. H. Huang, Albert Chin, C. Zhu, M. F. Li, B. J. Cho, and D. L. Kwong, "Al2O3/Ge-On-Insulator n- and p-MOSFETs with Fully NiSi and NiGe Dual Gates," IEEE Electron Device Lett., vol. 25, no. 3, pp. 138-140, Mar. 2004.

  • 62

    C. F. Tan, X. Y. Chen, Y. F. Lu, Y. H Wu, B. J. Cho, and J. N. Zeng, "Laser annealing of silicon nanocrystal films formed by pulsed-laser deposition," J. Laser Applicat., vol. 16, no. 1, pp. 40-45, Feb. 2004.

  • 61

    C. H. Poon, L. S. Tan, B. J. Cho, A. See, and M. Bhat, "Boron profile narrowing in laser processed silicon after rapid thermal anneal," J. Electrochem. Soc., vol. 151, no. 1, pp. G80-G83, Jan. 2004.

  • 60

    S. J. Ding, H. Hu, H. F. Lim, S. J. Kim, X. F. Yu, C. Zhu, M. F. Li, B. J. Cho, D. S. H. Chan, S. Rustagi, M. B. Yu, A. Chin, and D. L. Kwong, "High-performance MIM Capacitor using ALD high-K HfO2-Al2O3 laminate dielectrics," IEEE Electron Device Lett., vol. 24, no. 12, pp. 730-732, Dec. 2003.

  • 59

    C. C. Yeo, B. J. Cho, M. S. Joo, S. J. Whoang, and D. L. Kwong, “Improvement of electrical properties of MOCVD HfO2 by multi-step deposition process”, Electrochem. and Solid-State Lett., vol. 6, no. 11, pp. F42-F44, Nov. 2003.

  • 58

    M. S. Joo, B. J. Cho, C. C. Yeo, D. S. H. Chan, S. J. Whoang, N. Balasubramanian, and D. L. Kwong, "Formation of Hafnium-Aluminum-oxide gate dielectric using single cocktail liquid source in MOCVD process," IEEE Trans. Electron Devices, vol. 50, no. 10, p. 2088, Oct. 2003.

  • 57

    M. Y. Yang, C. H. Huang, A. Chin, C. Zhu, B. J. Cho, M. F. Li, and D. L. Kwong, "Very high density RF MIM capacitors (17 fF/um2) using high-K Al2O3 doped Ta2O5 dielectrics, IEEE Trans. Microw. Wireless Compon. Lett. , vol. 13, no. 10, pp. 431-433, Oct. 2003.

  • 56

    S. J. Kim, B. J. Cho, M. F. Li, Albert Chin, and D. L. Kwong, “Lanthanide (Tb)-doped HfO2 for high density MIM capacitors”, IEEE Electron Device Lett., Vo. 24, no. 7, p. 442, Jul. 2003.

  • 55

    S. J. Kim, B. J. Cho, M. F. Li, Albert Chin, and D. L. Kwong, “PVD HfO2 for high precision MIM capacitor applications”, IEEE Electron Device Lett., vol. 24, no. 6, p. 387, Jun. 2003.

  • 54

    C. S. Park, B. J. Cho, and D. L. Kwong, "An integratable dual metal gate CMOS process using and ultra-thin aluminum nitride buffer layer," IEEE Electron Device Lett., vol. 24, no. 5, p. 298, May. 2003.

  • 53

    X. Y. Chen, Y. F. Lu, Y. H. Wu, B. J. Cho, M. H. Liu, D. Y. Dai, and W. D. Dong, "Mechanisms of photoluminescence from silicon nanocrystals formed by pulsed laser deposition argon and oxygen ambient," J. Appl. Phys., vol. 93, no. 10, p. 6311, May. 2003.

  • 52

    H.Hu, C. Zhu, Y. F. Lu, Y. H. Wu, T. Liew, M. F. Li, B. J. Cho, W. K. Choi, and N. Yakovlev, "Physical and electrical characterization of HfO2 Metal-Insulator-Metal capacitors for Si analog circuit applications," J. Appl. Phys., vol. 94, no. 1, p. 551, 2003.

  • 51

    W. Y. Loh, B. J. Cho, C. H. Ang, J. Z. Zheng, and D. L. Kwong, "Localized oxide degradation in ultra-thin gate dielectric and its statistical analysis," IEEE Trans. on Electron Devices, vol. 50, no. 4, p. 967, Apr. 2003.

  • 50

    M. S. Joo, B. J. Cho, C. C. Yeo, N. Wu, H. Y Yu, C. Zhu, M. F. Li, D. L. Kwong, N. Balasubramanian, "Dependence of Chemical Composition Ratio on Electrical Properties of HfO2-Al2O3 Gate Dielectric", Jpn. J. Appl. Phys., vol. 42, no. 3A, pp. L220-L222, March. 2003.

  • 49

    C. H. Poon, B. J. Cho, Y. F. Lu, M. Bhat, and A. See, "Multiple-pulse laser annealing of preamorphized silicon for ultrashallow boron junction formation", J. Vacuum Sci. Technol. B, vol. 21, no. 2, pp. 706-709, Mar/Apr. 2003.

  • 48

    H. Hu, C. Zhu, X. Yu, A. Chin, M. F. Li, B. J. Cho, D. L. Kwong, P. D. Foo, M. B. Yu, "MIM capacitors using Atomic-Layer-Deposited high-K (HfO2)1-x(Al2O3)x dielectrics", IEEE Electron Device Lett., vol. 24, no. 2, pp. 60-62, Feb. 2003.

  • 47

    X. Yu, C. Zhu, H. Hu, A. Chin, M. F. Li, B. J. Cho, D. L. Kwong, P. D. Foo, M. B. Yu, "A high density MIM capacitor (13fF/um2) using ALD HfO2 dielectrics", IEEE Electron Device Lett., vol. 24, no. 2, pp. 63-65, Feb. 2003.

  • 46

    H. Y. Yu, N. Wu, M. F. Li, C. Zhu, B. J. Cho, D. L. Kwong, C. H. Tung, J. S. Pan, J. W. Chai, W. D. Wang, D. Z. Chi, C. H. Ang, J. Z. Zheng, "Thermal Stability of (HfO2)x(Al2O3)1-x on Si", Appl. Phys. Lett., vol. 81, no. 19, pp. 3618-3620, Nov. 2002.

  • 45

    H. Hang, C. Zhu, Y. F. Lu, M. F. Li, B. J. Cho, and W. K. Choi, "A high performance MIM capacitor using HfO2 dielectrics", IEEE Electron Device Lett., vol. 31, no. 1, pp. 17-19, Jan. 2010.

  • 44

    W. Y. Loh, B. J. Cho, and M. F. Li, "Correlation between direct tunneling leakage current degradation and interface traps in ultrathin silicon dioxides", Appl. Phys. Lett., vol. 81, no. 2, pp. 379-381, Jul. 2002.

  • 43

    H. Y. Yu, M. F. Li, B. J. Cho, C. C. Yeo, M. S. Joo, D. L. Kwong, J. S. Pan, C. H. Ang, and J. Z. Zheng, "Energy gap and band alignment for (HfO2)x(Al2O3)1-x on (100) Si", Appl. Phys. Lett., vol. 81, no. 2, pp. 376-378, Jul. 2002.

  • 42

    X. Y. Chen, Y. F. Lu, B. J. Cho, Y. P. Zeng, and Y. H. Wu, "Pattern-induced ripple structures at silicon-oxide/silicon interface by excimer laser irradiation", Appl. Phys. Lett., vol. 81, no. 7, pp. 1344-1346, Aug. 2002.

  • 41

    C. M. Lek, B. J. Cho, C. H. Ang, S. S. Tan, W. Y. Loh, J. Z. Zhen, and C. Lap, "Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETs", Semiconduct. Sci. Technol., vol. 17, pp. L25-L28, 2002.

  • 40

    W. Y. Loh, B. J. Cho, and M. F. Li, "Evolution of quasi-breakdown mechanism in thin gate oxides", J. Appl. Phys., vol. 91, no. 8, pp. 5302-5306, Apr. 2002.

  • 39

    C. H. Ang, C. M. Lek, S. S. Tan, B. J. Cho, T. Chen, W. Lin, and J. Z. Zhen, "Negative bias temperature instability on plasma-nitrided silicon dioxide film", Jpn. J. Appl. Phys., vol. 41, no. 3B, pp. L314-L316, Mar. 2002.

  • 38

    W. Y. Loh, B. J. Cho, and M. F. Li, "Investigation of quasi-breakdown mechanism through post-Quasi-Breakdown thermal annealing", Jpn. J. Appl. Phys., vol. 41, no. 5A, pp. 2873-2877, May. 2002.

  • 37

    C. H. Ang, S. S. Tan, C. M. Lek, W. Lin, Z. J. Zheng, T. Chen, and B. J. Cho, "Suppression of nitridation-induced interface traps and hole mobility degradation by nitrogen plasma nitridation", Electrochem. Solid-State Lett., vol. 5, no. 4, pp. G26-G28, 2002.

  • 36

    W. K. Chim, B. J. Cho, and J. M. P. Yue, "Hot-carrier lifetime dependence on channel width and silicon recess depth in n-channel metal-oxide-semiconductor field-effect-transistors with the recessed local oxidation of silicon isolation structure", Jpn. J. Appl. Phys., vol. 41, no. 1, pp. 47-53, Jan. 2002.

  • 35

    H. Guan, B. J. Cho, M. F. Li, Z. Xu, Y. D. He, and Z. Dong, "Experimental evidence of interface-controlled mechanism of quasi-breakdown in ultra-thin gate oxide", IEEE Trans. Electron Devices, vol. 48, no. 5, pp. 1010-1013, May. 2001.

  • 34

    B. J. Cho, S. J. Kim, C. H. Ang, C. H. Ling, M. S. Joo, and I. S. Yeo, "Reliability of thin gate oxides irradiated under X-ray lithography conditions", Jpn. J. Appl. Phys., vol. 40, no. 4B, pp. 2819-2822, Apr. 2001.>

  • 33

    C. H. Ang, C. H. Ling, Z. Y. Cheng, S. J. Kim, and B. J. Cho, "Bias and thermal annealings of radiation-induced leakage currents in thin gate oxides", IEEE Trans. Nucl. Sci., vol. 47, no. 6, pp. 2758-2764, Dec. 2000.

  • 32

    B. J. Cho, P. F. Chong, E. F. Chor, M. S. Joo, and I. S. Yeo, "Electron-beam irradiation-induced gate oxide degradation", J. Appl. Phys., vol. 88, no. 11, pp. 6731-6735, Dec. 2000.

  • 31

    C. H. Ang, C. H. Ling, Z. Y. Cheng, S. J. Kim, and B. J. Cho, "Annealing of Fowler-Nordheim stress-induced leakage currents in thin silicon dioxide films", J. Electrochem. Soc., vol. 147, no. 12, pp. 4676-4682, Dec. 2000.

  • 30

    C. H. Ang, C. H. Ling, B. J. Cho, S. J. Kim, and Z. Y. Cheng, "Radiation and electrical stress-induced hole trap-assisted tunneling currents in ultrathin gate oxides", Solid-State Electron., vol. 44, no. 11, pp. 2001-2007, Nov. 2000.

  • 29

    C. H. Ang, C. H. Ling, Z. Y. Cheng, S. J. Kim, and B. J. Cho, "A comparative study of radiation-induced and stress-induced leakage currents in thin gate oxides", Semicond. Sci. Technol., vol. 15, no. 10, pp. 961-964, Oct. 2000.

  • 28

    Z. Xu, B. J. Cho, and M. F. Li, "Annealing behavior of gate oxide leakage current after quasi-breakdown", Microelectron. Rel., vol. 40, no. 8-10, pp. 1341-1346, Oct. 2000.

  • 27

    S. J. Kim, B. J. Cho, P. F. Chong, E. F. Chor, C. H. Ang, C. H. Ling, M. S. Joo, and I. S. Yeo, "Does short wavelength lithography process degrade the integrity of thin gate oxide?", Microelectron. Rel., vol. 40, no. 8-10, pp. 1609-1613, Oct. 2000.

  • 26

    C. H. Ang, C. H. Ling, Z. Y. Cheng, B. J. Cho, and S. J. Kim, "Reduction of stress-induced leakage currents in thin oxides by application of a low post-stress gate bias", J. Appl. Phys., vol. 88, no. 5, pp. 3087-3089, Sep. 2000.

  • 25

    C. H. Ang, C. H. Ling, Z. Y. Cheng, and B. J. Cho, "Origin of temperature-sensitive hole current at low gate voltage regime in ultrathin gate oxide", J. Appl. Phys., vol. 88, no. 5, pp. 2872-2876, Sep. 2000.

  • 24

    J. Luo, Y. C. Liang, and B. J. Cho, "Design of LIGBT protection circuit for smart power integration", IEEE Trans. Ind. Electron., vol. 47, no. 4, pp. 744-750, Aug. 2000.

  • 23

    H. Guan, M. F. Li, Y. D. He, B. J. Cho, and Z. Dong, "A thorough study of quasi-breakdown phenomenon of thin gate oxide in dual-gate CMOSFET's", IEEE Trans. Electron Devices, vol. 47, no. 8, pp. 1608-1616, Aug. 2000.

  • 22

    C. H. Ang, C. H. Ling, Z. Y. Cheng, S. J. Kim, and B. J. Cho, "Reduction of radiation-induced leakage currents in thin oxides by application of a low post-irradiation gate bias", Jpn. J. Appl. Phys., vol. 39, no. 7B, pp. L757-L759, Jul. 2000.

  • 21

    B. J. Cho, S. J. Kim, C. H. Ling, M. S. Joo, and I. S. Yeo, "A comparison between leakage currents in thin gate oxides subjected to X-ray radiation and electrical stress degradation", Solid-State Electron., vol. 44, no. 7, pp. 1289-1292, Jul. 2000.

  • 20

    P. F. Chong, B. J. Cho, E. F. Chor, M. S. Joo, and I. S. Yeo, "Investigation of reliability degradation of ultra-thin gate oxides irradiated under electron-beam lithography conditions", Jpn. J. Appl. Phys., vol. 39, no. 4B, pp. 2181-2185, Apr. 2000.

  • 19

    J. M. P. Yue, W. K. Chim, B. J. Cho, D. S. H. Chan, W. H. Qin, Y. B. Kim, S. A. Jang, and I. S. Yeo, "Hot-carrier degradation mechanism in narrow- and wide- channel n-MOSFET's with recessed LOCOS isolation structure", IEEE Electron Device Lett., vol. 21, no. 3, pp. 130-132, Mar. 2000.

  • 18

    B. J. Cho, Z. Xu, H. Guan, and M. F. Li, "Effect of substrate hot-carrier injection on quasi-breakdown of ultra-thin gate oxide", J. Appl. Phys., vol. 86, no. 11, pp. 6590-6592, Dec. 1999.

  • 17

    B. J. Cho, L. H. Ko, Y. A. Nga, and L. H. Chan, "Impact of nitrogen implantation into polysilicon followed by drive-in process on gate oxide integrity", J. Electrochem. Soc., vol. 146, no. 11, pp. 4259-4262, Nov. 1999.

  • 16

    M. F. Li, Y. D. He, S. G. Ma, B. J. Cho, K. F. Lo, and M. Z. Xu, "Role of hole fluence in gate oxide breakdown", IEEE Electron Device Lett., vol. 20, no. 11, pp. 586-588, Nov. 1999.

  • 15

    Y. D. He, H. Guan, M. F. Li, B. J. Cho, and Z. Dong, "Conduction mechanism under quasi-breakdown of ultra-thin gate oxide", Appl. Phys. Lett., vol. 75, no. 16, pp. 2432-2434, Oct. 1999.

  • 14

    S. A. Jang, I. S. Yeo, Y. B. Kim, and B. J. Cho, "Isolation process induced wafer warpage", Electrochem. Solid-State Lett., vol. 1, no. 1, pp. 46-48, Jul. 1998.

  • 13

    S. A. Jang, Y. B. Kim, B. J. Cho, and J. C. Kim, "A mechanism of field-oxide-ungrowth phenomenon on recessed LOCOS isolation process and practical solution", J. Electrochem. Soc., vol. 144, no. 8, pp. 2933-2940, Aug. 1997.

  • 12

    S. A. Jang, Y. B. Kim, B. J. Cho, and J. C. Kim, "Evaluation of double spacer local oxidation of silicon (LOCOS) isolation for sub-quarter micron design rule", Jpn. J. Appl. Phys., vol. 36, no. 3b, pp. 1433-1438, Mar. 1997.

  • 11

    B. J. Cho, S. A. Jang, Y. B. Kim, D. D. Lee, and J. C. Kim, "Anomalous field-oxide-ungrowth phenomenon in recessed LOCOS isolation structure", J. Electrochem. Soc., vol. 144, no. 1, pp. 320-326, Jan. 1997.

  • 10

    J. G. Oh, K. H. Lee, B. J. Cho, and J. C. Kim, "Shallow p+ -n junction formation by Ge pre-amorphization and additional RTA", J. Kor. Appl. Phys., vol. 9, no. 4, p. 506, Jul. 1996.

  • 9

    S. K. Kwon, C. Lim, B. J. Cho, and J. C. Kim, "Nano-trenched local oxidation of silicon isolation using island polysilicon grains", J. Electrochem. Soc., vol. 143, no. 2, pp. 639-642, Feb. 1996.

  • 8

    B. J. Cho, P. Vandenabeele and K. Maex, "Development of a hexagonal shaped rapid thermal processor using a vertical tube", IEEE Trans. Semicond. Manuf., vol. 7, no. 3, pp. 345-353, Aug. 1994.

  • 7

    B. J. Cho, S. K. Park, and C. K. Kim, "Estimation of effective diffusion time in a rapid thermal diffusion using a solid diffusion source", IEEE Trans. Electron Devices, vol. 39, no. 1, pp. 111-117, Jan. 1992.

  • 6

    J. G. Kim, B. J. Cho, and C. K. Kim, "AES study of rapid thermal boron diffusion into silicon from a solid diffusion source in oxygen ambient", J. Electrochem. Soc., vol. 137, no. 9, pp. 2857-2860, Sep. 1990.

  • 5

    B. J. Cho and C. K. Kim, "Elimination of slips on silicon wafer edge in rapid thermal process by using a ring oxide", J. Appl. Phys., vol. 67, no. 12, pp. 7583-7586, Jun. 1990.

  • 4

    B. J. Cho, J. G. Kim, and C. K. Kim, "Characteristics of NMOS transistors with phosphorus source/drain formed by rapid thermal diffusion", J. Kor. Inst. Telematics. Electron., vol. 27, no. 9, pp. 1409-1418, Sep. 1990.

  • 3

    B. J. Cho and C. K. Kim, "Rapid thermal annealing of high dose BF2 implanted silicon", J. Kor. Appl. Phys., vol. 2, no. 4, p. 407, Nov. 1989.

  • 2

    K. T. Kim, C. K. Kim, B. J. Cho, and J. G. Kim, "Formation of shallow phosphorus layers by rapid thermal processing using a solid diffusion source", J. Kor. Inst. Elect. Eng., vol. 1, no. 2, pp. 105-109, Sep. 1988.

  • 1

    B. J. Cho, K. T. Kim, and C. K. Kim, "Temperature control and wafer temperature distribution simulation in RTA system", J. Kor. Inst. Telematics. Electron., vol. 25, no. 6, pp. 647-653, Jun. 1988.